This invention relates generally to ferroelectric capacitors. More particularly, the present invention relates to a technique and structure for preventing degradation in the electrical performance of ferroelectric capacitors.
A portion of a prior art integrated circuit ferroelectric memory cell 10 including a transistor and a ferroelectric capacitor is shown in FIG. 1. A silicon or other substrate 12 includes a diffused region 14, which forms part of a transistor used in the memory cell. A thick oxide layer 16 forms the substrate for the ferroelectric capacitor. The thick oxide layer 16 is patterned and etched to allow access to diffused region 14. The ferroelectric capacitor includes a platinum bottom electrode 18, a ferroelectric layer 20, typically PZT (lead zirconate titanate), and a platinum top electrode 22. A subsequent oxide layer 24 is deposited, which is patterned and etched, to provide access to diffused region 14, bottom electrode 18, and to top electrode 22. A local interconnect layer 26 is deposited, patterned and etched, to provide a local interconnect 26A between top electrode 22 and diffused region 14, as well as metalization 26B for bottom electrode 18.
It is well known in the ferroelectric arts that certain ferroelectric materials, particularly PZT, are susceptible to degradation of electrical switching performance if exposed to hydrogen. One source of hydrogen can be found in the plastic packaging materials often used with integrated circuits. Another source of hydrogen can be found in the various oxide layers used in fabricating the ferroelectric capacitor or memory cell.
A section 28 of memory cell 10 is shown in greater magnification in FIG. 2 to illustrate the problem of hydrogen sensitivity that exists within the prior art memory cell. Section 28 shows oxide layer 16, bottom electrode 18, ferroelectric layer 20, top electrode 22, oxide layer 24, and local interconnect 26A. Note particularly in FIG. 2 that there is an interface between oxide layer 24 and ferroelectric layer 20. The interface extends along the top surface and sides of ferroelectric layer 20. During and after fabrication, hydrogen is generated within oxide layer 24, which in turn is gradually absorbed by ferroelectric layer 20. The arrows shown in FIG. 2 show generally the probable path of hydrogen diffusion into the ferroelectric layer 20. Studies have shown that exposure to hydrogen gradually degrades the amount of switching charge produced by the ferroelectric capacitor. Over time, the exposure to hydrogen may destroy electrical switching performance altogether.
What is desired, therefore, is a technique and structure to reduce hydrogen sensitivity in an integrated ferroelectric capacitor.